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Technology & Networking in Silicon Valley & the SF Bay Area: Upcoming Meetings, Courses and Conferences

May 21, 2013

Short Course: Low-Power Design Essentials

by @ 10:30 am. Filed under ALL, Electronics Design, Engineering Mgmt, Semiconductors
 

MONDAY July 15, 2013
SCV PACE (Professional Activities Committee for Engineers)
Instructor: Professor Jan Rabaey, Scientific Co-director, Berkeley Wireless Research Center (BWRC)
Time: 5:30 PM to 8:30 PM
Cost: $50 regular admission; $40 for IEEE members; $25 for students
Place: Maxim Integrated HQ, 160 Rio Robles, San Jose
RSVP: from website
Web: pace-course2013.eventbrite.com

This course presents an overview of the basics as well as the more advanced techniques in low-power design.  The first part of the lecture will focus on the fundamentals of low-power design and a number of well-established techniques will be (more…)

May 20, 2013

Mtg: Adapting Failure Modes and Effects Analysis (FMEA) to Select Hazard Mitigation Measures

by @ 3:40 pm. Filed under ALL, Electronics Design, Engineering Mgmt, Semiconductors
 

THURSDAY May 23, 2013
OEB Industry Applications Chapter
Speaker: Marcelo E. Valdez, GE Energy Industrial Solutions
Time: Networking at 5:30 PM; Presentation at 6:15 PM; Dinner at 7:15 PM; Presentation continues at 8:00 PM
Cost: $25 for IEEE members; $30 for non-members; $15 for student and retired members
Place: Zio Fraedos, 611 Gregory Lane, Pleasant Hill
RSVP: by May 20 to Michael Nakamura, michael@mkireps.com (925) 330-6595
Web: www.e-grid.net/docs/1305-oeb-ias.pdf

FMEA is a common analytical tool used in product development, manufacturing and operations management to understand potential failure modes inclusive of the severity and likelihood of those failures.  FMEA helps a practitioner identify potential failure (more…)

Mtg: A Comparison of Low-Cost Interposer Technologies

by @ 3:39 pm. Filed under ALL, Electronics Design, Semiconductors
 

THURSDAY May 23, 2013
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Terry Kang, Sr. Packaging Development Manager, Nvidia
Time: Networking and lunch at 11:30 AM; Presentation at 12:15 PM
Cost: $15 for lunch ($5 for students, unemployed); no cost for presentation
Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1305l.html

The 2.5D through-silicon-via interposer is the key enabling technology for integrating multi-functional dies to achieve higher electrical performance and smaller package form factors.  One of the key challenges for high-volume production is high cost.  This presentation (more…)

May 12, 2013

Mtg: Chip Design and System Building Techniques at the Interface: Enabling New Wireless Sensors

by @ 7:23 am. Filed under ALL, BioEngineering, Communications, Electronics Design, Optics/Displays, Semiconductors
 

MONDAY June 10, 2013
SCV Circuits and Systems Chapter
Speaker: Prof. Brian Otis, University of Washington
Time: Networking and light dinner at 6:30 PM; Presentation at 7:00 PM
Cost: none; $2 accepted for food
Place: QualComm, Building B, 3165 Kifer Road, Santa Clara
RSVP: from website
Web: sites.ieee.org/scv-cas

Advances in chip and system design will help define the next generation of wireless sensors.  I’ll discuss examples of our work that have enabled new collaborative science.  We will then cover chip design techniques for body-worn/implantable systems and (more…)

May 8, 2013

Mtg: Energy Harvesting from Waste Heat and Sunlight with Mesoscopic Materials

by @ 7:27 am. Filed under ALL, Electrical/Power, Electronics Design, NanoEngineering, Semiconductors
 

TUESDAY June 18, 2013
SCV Nanotechnology Chapter
Speaker: Prof. Nobuhiko P. Kobayashi, Dept. of Electrical Engineering, UC Santa Cruz
Time: Networking, Pizza & drinks at Noon, with presentation following
Cost: IEEE Members: $5, Non-members: $10
Place: TI Auditorium E-1, 2900 Semiconductor Dr, Santa Clara
RSVP: from website
Web: sites.ieee.org/sfbanano

Designing solid-state devices is essentially restricted by choosing available chemical elements found on the Periodic Table and forming various stable solids made of these chemical elements.  A key to developing novel solid-state devices is, therefore, to find (more…)

May 6, 2013

Mtg: Self Organizing Networks (SONs)

by @ 7:51 am. Filed under ALL, Communications, Computers/Software, Optics/Displays, Semiconductors
 

WEDNESDAY May 8, 2013
SCV Communications Chapter
Speakers: Andrea Goldsmith, Stanford University & Accelera; Amit Jain, Spidercloud Wireless; Rajat Prakash, Qualcomm
Time: Networking and food at 6:30 PM; Presentations at 6:45 PM
Cost: $5 donation for food
Place: Texas Instruments Building E, 2900 Semiconductor Dr., Santa Clara
RSVP: from website
Web: www.ewh.ieee.org/r6/scv/comsoc

Exponential growth in wireless data driven by the rapid increase in smartphones is driving carriers to increase the number of base stations in their radio access networks.  As the number of base stations increases, it becomes increasingly (more…)

Mtg: Nanomaterial Synthesis and Integration for Sensor and Energy Applications

by @ 7:50 am. Filed under ALL, Communications, Electronics Design, NanoEngineering, Semiconductors
 

WEDNESDAY May 8, 2013
SCV Components, Packaging and Manufacturing Technology Chapter
Speaker: Heather C. Chiamori, Berkeley Sensor & Actuator Center (BSAC), UC-Berkeley
Time: Optional dinner at 6:00 PM; Presentation at 6:45 PM
Cost: $20 for dinner ($10 for students, unemployed); no cost for presentation
Place: Biltmore Hotel, 2151 Laurelwood Rd, Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1305.html

Nanostructures exhibit unique properties such as large surface-to-volume ratios, increased sensitivity at lower input power levels, and higher current carrying capability contributing to increased functionality of nanostructure devices that (more…)

Mtg: Semiconductor Laser Reliability and Failure Analysis

by @ 7:49 am. Filed under ALL, Communications, Electronics Design, Optics/Displays, Semiconductors
 

TUESDAY May 7, 2013
SCV Photonics, with Reliability Chapter
Speaker: Dr. Robert W. Herrick
Time: Networking and Pizza at 6:00 PM; Presentation at 7:00 PM
Cost: none
Place: Cogswell College Dragon’s Den, 1175 Bordeaux Dr., Sunnyvale
RSVP: not required
Web: ewh.ieee.org/r6/scv/leos

Semiconductor lasers are the least expensive lasers available, as well as the most reliable.  But they have a remarkably hard job, and most types are vulnerable to catastrophic failure if numerous precautions are not taken in their design and (more…)

April 29, 2013

Mtg: Ultra-low Power Circuit Design

by @ 6:43 pm. Filed under ALL, Electrical/Power, Electronics Design, Semiconductors
 

TUESDAY May 21, 2013
SCV Power & Energy and Industry Applications Chapter
Speaker: Anantha Chandrakasan, EE/CS, MIT
Time: Dinner & Networking at 6:00 PM; Presentation at 7:00 PM
Cost: $35 for IEEE members, $45 for non-members
Place: PARC, 3333 Coyote Hill Road, Palo Alto
RSVP: from website
Web: www.ewh.ieee.org/r6/scv/pes_ias

Next-generation portable multimedia devices and wireless sensors will require a dramatic reduction in energy consumption.  Next generation wireless sensors will need to consume nanowatts to microwatts and operate using energy-harvesting (more…)

Webinar: How To Write A Technical Paper

by @ 6:09 pm. Filed under ALL, Communications, Computers/Software, Electronics Design, Semiconductors
 

THURSDAY May 2, 2013
SCV Electromagnetic Compatibility, plus Grads of the Last Decade (GOLD)
Speaker: Dr. Jun Fan, Missouri University of Science and Technology
Time: 11:00 AM (PDT)
Cost: none
Place: on the Web
RSVP: not required
Web: www.scvemc.org

Dr. Fan will provide some suggestions on how to write a technical paper for the most common IEEE EMC venues and discuss some very practical tips of how to be successful in doing that, from choosing the topic, structuring the article itself, provide a complete (more…)

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