IEEE S.F. Bay Area Council e-GRID's
BayAreaTech

WEDNESDAY June 13, 2012
SCV Components, Packaging and Manufacturing Technology Chapter 
Speaker: Farshad Ghahghahi, Manager, Package Design, LSI Corporation
Time: Buffet dinner at 6:00 PM, Presentation at 6:45 PM
Cost: $20 if reserved by June 11; $10 for fulltime students and currently unemployed engineers; $5 more at the door
Place: Biltmore Hotel, 2151 Laurelwood Rd (Fwy 101 at Montague Expressway), Santa Clara
RSVP: from website
Web: www.cpmt.org/scv/meetings/cpmt1206.html

Several forces are driving a resurgence of interest in Multi-Die Packaging.  While foundries hit increasing NRE, product cost and technical barriers, the Packaging Community has produced a plethora of Multi-Die solutions including Stacked Die, PoP (Package on Package), PIP (Package in Package), 2.5D, and 3D, and seen increasing use of MCM’s (Multi Chip Modules) using prepackaged memory chips.  More exotic solutions are emerging such as Embedded Die, Glass Interposers and Wafer Level Fan Out.
While these solutions, or combinations of these solutions, offer significant advances in latency, bandwidth, power and form-factor, they face significant hurdles of supply chain and KGD (Known Good Die) issues and will ultimately be judged by the cold, unforgiving eye of the accountant.
The presentation will consider these drivers and strategies from a High End Custom solution perspective.